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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-09-28 09:55:51 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-10-13 05:46:08 +0000 |
| commit | dcc1355de7f6141ba64d1482563efc5898e0a020 (patch) | |
| tree | 25eebf7da25526064f118edd84eb81e2ca268980 /util/inteltool/pcie.c | |
| parent | 299689c85fca99f71603ced38d48ee34bb327795 (diff) | |
mb/{51nb/x210,razer/blade_stealth_kbl}/dsdt.asl: decrease DSDT revision from 0x5 to 0x2
DSDT revision 2 is used for ACPI v2 and greater.
Change-Id: Ia019358be6574db1b2b06a8a7d52ae996cf45571
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45783
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'util/inteltool/pcie.c')
0 files changed, 0 insertions, 0 deletions