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authorLee Leahy <leroy.p.leahy@intel.com>2016-07-30 07:34:20 -0700
committerLee Leahy <leroy.p.leahy@intel.com>2016-08-01 20:36:20 +0200
commitf67e2cf9cf7a20e645ab2452c4b40e512bd21f50 (patch)
treed2ddeb54f1860b28fd96fa398578c6f6b675f096 /util/inteltool/memory.c
parentc1dc9d725ec9d91af1df99bb7da16e602996ac1b (diff)
arch/x86: Display MTRRs after MTRR update in postcar
Display the MTRRs after they have been updated during the postcar stage. TEST=Build and run on Galileo Gen2 Change-Id: I1532250cacd363c1eeaf72edc6cb9e9268a11375 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/15991 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'util/inteltool/memory.c')
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