diff options
| author | Sean Rhodes <sean@starlabs.systems> | 2021-10-22 09:31:22 +0100 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2022-05-16 07:04:22 +0000 |
| commit | 645dde77940d12979166555b17dbc81cda1bc48b (patch) | |
| tree | 3338eae7865ce32db581c3a5b12bbc0408eebce1 /util/inteltool/inteltool.h | |
| parent | 8a80cc8dd0c7d33de560abcffa4bc348554a00ea (diff) | |
util/inteltool: Add support for Gemini Lake
Tested on:
* StarLite Mk III (N5000)
* StarLite Mk IV (N5030)
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I0ef7619c04db66ea0c6e179bdf0a58ed1ab61a48
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58537
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'util/inteltool/inteltool.h')
| -rw-r--r-- | util/inteltool/inteltool.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/util/inteltool/inteltool.h b/util/inteltool/inteltool.h index 3c68b6671d..94450ec753 100644 --- a/util/inteltool/inteltool.h +++ b/util/inteltool/inteltool.h @@ -294,6 +294,7 @@ static inline uint32_t inl(unsigned port) #define PCI_DEVICE_ID_INTEL_APL_LPC 0x5ae8 #define PCI_DEVICE_ID_INTEL_DNV_LPC 0x19dc +#define PCI_DEVICE_ID_INTEL_GLK_LPC 0x31E8 /* Intel starts counting these generations with the integration of the DRAM controller */ #define PCI_DEVICE_ID_INTEL_CORE_0TH_GEN 0xd132 /* Nehalem */ |