diff options
| author | Idwer Vollering <vidwer@gmail.com> | 2010-12-17 22:34:58 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-12-17 22:34:58 +0000 |
| commit | 312fc96874ff2b3fd1a839b72dd10edb1b8937b8 (patch) | |
| tree | a73f2971e0d8dbf9927f3ab5e933acfc0a5a3d30 /util/inteltool/inteltool.h | |
| parent | 397ff6815f48182e9f05372aefcad55950d2dc36 (diff) | |
inteltool: Model 0xf2x, ICH5, i865 support.
Add support for dumping the MSRs on model_f2x and dumping GPIOs and PM
registers on ICH5. Add ICH5 and i865 to the supported chips list.
Enable the dumping of BAR6 on i865.
Sample output:
Disabling memory access:
$ sudo setpci -s 6.0 0x04.b=0x0
$ sudo ./inteltool -m | head -n 9
Intel CPU: Processor Type: 0, Family f, Model 2, Stepping 7
Intel Northbridge: 8086:2570 (i865)
Intel Southbridge: 8086:24d0 (ICH5)
============= MCHBAR ============
Access to BAR6 is currently disabled, attempting to enable.
Enabled successfully.
BAR6 = 0xfecf0000 (MEM)
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6197 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/inteltool/inteltool.h')
| -rw-r--r-- | util/inteltool/inteltool.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/util/inteltool/inteltool.h b/util/inteltool/inteltool.h index 66d1aec259..65792e4a90 100644 --- a/util/inteltool/inteltool.h +++ b/util/inteltool/inteltool.h @@ -24,7 +24,7 @@ #include <sys/io.h> #endif #if (defined(__MACH__) && defined(__APPLE__)) -/* DirectIO is available here: http://www.coresystems.de/en/directio */ +/* DirectHW is available here: http://www.coresystems.de/en/directhw */ #define __DARWIN__ #include <DirectIO/darwinio.h> #endif @@ -44,6 +44,7 @@ #define PCI_DEVICE_ID_INTEL_ICH2 0x2440 #define PCI_DEVICE_ID_INTEL_ICH4 0x24c0 #define PCI_DEVICE_ID_INTEL_ICH4M 0x24cc +#define PCI_DEVICE_ID_INTEL_ICH5 0x24d0 #define PCI_DEVICE_ID_INTEL_ICH6 0x2640 #define PCI_DEVICE_ID_INTEL_ICH7DH 0x27b0 #define PCI_DEVICE_ID_INTEL_ICH7 0x27b8 @@ -66,6 +67,7 @@ #define PCI_DEVICE_ID_INTEL_82810E_MC 0x7124 #define PCI_DEVICE_ID_INTEL_82830M 0x3575 #define PCI_DEVICE_ID_INTEL_82845 0x1a30 +#define PCI_DEVICE_ID_INTEL_82865 0x2570 #define PCI_DEVICE_ID_INTEL_82915 0x2580 #define PCI_DEVICE_ID_INTEL_82945P 0x2770 #define PCI_DEVICE_ID_INTEL_82945GM 0x27a0 @@ -114,7 +116,7 @@ void unmap_physical(void *virt_addr, size_t len); unsigned int cpuid(unsigned int op); int print_intel_core_msrs(void); -int print_mchbar(struct pci_dev *nb); +int print_mchbar(struct pci_dev *nb, struct pci_access *pacc); int print_pmbase(struct pci_dev *sb, struct pci_access *pacc); int print_rcba(struct pci_dev *sb); int print_gpios(struct pci_dev *sb); |