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author | Christian Walter <christian.walter@9elements.com> | 2019-05-06 17:50:57 +0200 |
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committer | Patrick Rudolph <siro@das-labor.org> | 2019-05-15 17:21:39 +0000 |
commit | 9a8c5e7ac0f559898c4d5fcb99a51e4dc472f51f (patch) | |
tree | 264df24c777ff3628afa9ac9659727193b5b919a /util/inteltool/inteltool.c | |
parent | df85bf79189a0a1a682f5731f2c332acfa28055c (diff) |
util/inteltool: Add Kabylake E3-1200 Support
Change-Id: I5c55102d7ce15dbb708e9433500ebd1ed53179ad
Signed-off-by: Christian Walter <christian.walter@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32619
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'util/inteltool/inteltool.c')
-rw-r--r-- | util/inteltool/inteltool.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/util/inteltool/inteltool.c b/util/inteltool/inteltool.c index 40e7646450..7e02510752 100644 --- a/util/inteltool/inteltool.c +++ b/util/inteltool/inteltool.c @@ -135,6 +135,8 @@ static const struct { "7th generation (Kaby Lake family) Core Processor (Mobile)" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_U_Q, "7th generation (Kaby Lake family) Core Processor (Mobile)" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_E3, + "7th generation (Kaby Lake family) Core Processor Xeon E3-1200" }, /* Southbridges (LPC controllers) */ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371XX, "371AB/EB/MB" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10, "ICH10" }, |