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authorUwe Hermann <uwe@hermann-uwe.de>2008-05-14 21:20:55 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2008-05-14 21:20:55 +0000
commit9a6b6b51df7681931cea26c6e13d7a4fcd4650d3 (patch)
treeadda103ae2d355a451bdbd5a9460692dbb728682 /util/inteltool/inteltool.8
parent621c09563b5300b2ea9821d0e4aec9224bb1c97f (diff)
Cosmetics, whitespace, coding style, partially ident-aided (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3318 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/inteltool/inteltool.8')
-rw-r--r--util/inteltool/inteltool.835
1 files changed, 18 insertions, 17 deletions
diff --git a/util/inteltool/inteltool.8 b/util/inteltool/inteltool.8
index f58034fd43..7b172f0ce8 100644
--- a/util/inteltool/inteltool.8
+++ b/util/inteltool/inteltool.8
@@ -1,4 +1,4 @@
-.TH INTELTOOL 8 "May 12, 2008"
+.TH INTELTOOL 8 "May 14, 2008"
.SH NAME
inteltool \- a tool for dumping Intel(R) CPU / chipset configuration parameters
.SH SYNOPSIS
@@ -7,9 +7,9 @@ inteltool \- a tool for dumping Intel(R) CPU / chipset configuration parameters
.B inteltool
is a handy little tool for dumping the configuration space of Intel(R)
CPUs, northbridges and southbridges.
-
+.sp
This tool has been developed for the coreboot project (see
-.B http://www.coreboot.org/
+.B http://coreboot.org
for details on coreboot).
.SH OPTIONS
.TP
@@ -20,31 +20,32 @@ Show a help text and exit.
Show version information and exit.
.TP
.B "\-a, \-\-all"
-Dump all known I/O Controller Hub (ICH) southbridge, Intel(R) northbridge and Intel(R) Core CPU MSRs.
+Dump all known I/O Controller Hub (ICH) southbridge, Intel(R) northbridge
+and Intel(R) Core CPU MSRs.
.TP
.B "\-g, \-\-gpio"
-Dump I/O Controller Hub (ICH) southbridge GPIO registers
+Dump I/O Controller Hub (ICH) southbridge GPIO registers.
.TP
.B "\-r, \-\-rcba"
-Dump I/O Controller Hub (ICH) southbridge RCBA registers
+Dump I/O Controller Hub (ICH) southbridge RCBA registers.
.TP
.B "\-p, \-\-pmbase"
-Dump I/O Controller Hub (ICH) southbridge pmbase registers
+Dump I/O Controller Hub (ICH) southbridge PMBASE registers.
.TP
.B "\-m, \-\-mchbar"
-Dump Intel(R) northbridge MCHBAR registers
+Dump Intel(R) northbridge MCHBAR registers.
.TP
.B "\-e, \-\-epbar"
-Dump Intel(R) northbridge EPBAR registers
+Dump Intel(R) northbridge EPBAR registers.
.TP
.B "\-d, \-\-dmibar"
-Dump Intel(R) northbridge DMIBAR registers
+Dump Intel(R) northbridge DMIBAR registers.
.TP
.B "\-P, \-\-pciexbar"
-Dump Intel(R) northbridge PCIEXBAR registers
+Dump Intel(R) northbridge PCIEXBAR registers.
.TP
.B "\-M, \-\-msrs"
-Dump Intel(R) CPU MSRs
+Dump Intel(R) CPU MSRs.
.SH BUGS
Please report any bugs at
.BR http://tracker.coreboot.org/trac/coreboot/newticket ","
@@ -54,13 +55,13 @@ or on the coreboot mailing list
.B inteltool
is covered by the GNU General Public License (GPL), version 2.
.SH COPYRIGHT
-(C) 2008 coresystems GmbH
+Copyright (C) 2008 coresystems GmbH
.SH AUTHORS
Stefan Reinauer <stepan@coresystems.de>
.PP
This manual page was written by Stefan Reinauer <stepan@coresystems.de>.
It is licensed under the terms of the GNU GPL (version 2).
-
-Intel(R) is a registered trademark of Intel Corporation. Other product and/or company names mentioned herein may be trademarks or registered trademarks of their respective owners.
-
-
+.sp
+Intel(R) is a registered trademark of Intel Corporation. Other product
+and/or company names mentioned herein may be trademarks or registered
+trademarks of their respective owners.