diff options
| author | Anton Kochkov <anton.kochkov@gmail.com> | 2010-05-30 12:33:12 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-05-30 12:33:12 +0000 |
| commit | da0b456ad087daa384d30498132e4e59fa311e14 (patch) | |
| tree | 4d3e1c86733c4db755cd665bf080c87b159fff44 /util/inteltool/gpio.c | |
| parent | 32e6e411eaab6b745aca1f74f2d9b5b2df641915 (diff) | |
Added support to ICH9 chipset family
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5597 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/inteltool/gpio.c')
| -rw-r--r-- | util/inteltool/gpio.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/util/inteltool/gpio.c b/util/inteltool/gpio.c index 665f4696ea..4d0ced81ba 100644 --- a/util/inteltool/gpio.c +++ b/util/inteltool/gpio.c @@ -114,6 +114,24 @@ static const io_register_t ich8_gpio_registers[] = { { 0x3C, 4, "GPIO_USE_SEL Override (HIGH)" } }; +static const io_register_t ich9_gpio_registers[] = { + { 0x00, 4, "GPIO_USE_SEL" }, + { 0x04, 4, "GP_IO_SEL" }, + { 0x08, 4, "RESERVED" }, + { 0x0c, 4, "GP_LVL" }, + { 0x10, 4, "RESERVED" }, + { 0x14, 4, "RESERVED" }, + { 0x18, 4, "GPO_BLINK" }, + { 0x1c, 4, "GP_SER_BLINK" }, + { 0x20, 4, "GP_SB_CMDSTS" }, + { 0x24, 4, "GP_SB_DATA" }, + { 0x28, 4, "RESERVED" }, + { 0x2c, 4, "GPI_INV" }, + { 0x30, 4, "GPIO_USE_SEL2" }, + { 0x34, 4, "GP_IO_SEL2" }, + { 0x38, 4, "GP_LVL2" }, + { 0x3C, 4, "RESERVED" } +}; int print_gpios(struct pci_dev *sb) { @@ -124,6 +142,16 @@ int print_gpios(struct pci_dev *sb) printf("\n============= GPIOS =============\n\n"); switch (sb->device_id) { + case PCI_DEVICE_ID_INTEL_ICH9DH: + case PCI_DEVICE_ID_INTEL_ICH9DO: + case PCI_DEVICE_ID_INTEL_ICH9R: + case PCI_DEVICE_ID_INTEL_ICH9: + case PCI_DEVICE_ID_INTEL_ICH9M: + case PCI_DEVICE_ID_INTEL_ICH9ME: + gpiobase = pci_read_word(sb, 0x48) & 0xfffc; + gpio_registers = ich9_gpio_registers; + size = ARRAY_SIZE(ich9_gpio_registers); + break; case PCI_DEVICE_ID_INTEL_ICH8M: gpiobase = pci_read_word(sb, 0x48) & 0xfffc; gpio_registers = ich8_gpio_registers; |