diff options
| author | Thomas Heijligen <thomas.heijligen@secunet.com> | 2019-02-19 10:51:34 +0000 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-15 12:58:28 +0000 |
| commit | 725369fd0cfb52c914c7c1afdb43b5b13072a16a (patch) | |
| tree | c2d22ee11aa5e94c95777fb72e64a949efc869fc /util/inteltool/gpio.c | |
| parent | 02bd77379bec15ecbbe4f931d19112d267ef4607 (diff) | |
inteltool: add 300 and C240 Series PCH
Values from
- Intel doc 337347 rev4
- coreboot soc/intel/cannonlake/include/soc/gpio_soc_defs_cnp_h.h
On Coffeelake H (using Cannonlake / Cannonpoint PCH) p2sb is not
accessible. Using a static value instead. 0xfd000000 is a common value
chosen by coreboot and non-coreboot firmware.
Change-Id: Id637f703ab0a99eb0908ecdc3da27ba80db1c6b8
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31500
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'util/inteltool/gpio.c')
| -rw-r--r-- | util/inteltool/gpio.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/util/inteltool/gpio.c b/util/inteltool/gpio.c index 6ec3bb70b6..41f4df90c8 100644 --- a/util/inteltool/gpio.c +++ b/util/inteltool/gpio.c @@ -1034,6 +1034,16 @@ int print_gpios(struct pci_dev *sb, int show_all, int show_diffs) case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_IHDCP_BASE: case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_IHDCP_PREM: case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_IHDCP_PREM: + case PCI_DEVICE_ID_INTEL_H310: + case PCI_DEVICE_ID_INTEL_H370: + case PCI_DEVICE_ID_INTEL_Z390: + case PCI_DEVICE_ID_INTEL_Q370: + case PCI_DEVICE_ID_INTEL_B360: + case PCI_DEVICE_ID_INTEL_C246: + case PCI_DEVICE_ID_INTEL_C242: + case PCI_DEVICE_ID_INTEL_QM370: + case PCI_DEVICE_ID_INTEL_HM370: + case PCI_DEVICE_ID_INTEL_CM246: print_gpio_groups(sb); return 0; case PCI_DEVICE_ID_INTEL_82371XX: |