aboutsummaryrefslogtreecommitdiff
path: root/util/inteltool/gpio.c
diff options
context:
space:
mode:
authorStefan Reinauer <stepan@coresystems.de>2008-12-04 15:18:20 +0000
committerStefan Reinauer <stepan@openbios.org>2008-12-04 15:18:20 +0000
commit1162f25a49e8f39822123d664cda10fef466b351 (patch)
tree22afd92c49e7b79fdea37c3e3aef6b34cb70af2f /util/inteltool/gpio.c
parentfcf9be3b9305cfddaf74594fcaec4d6f23541154 (diff)
Patch to util/inteltool:
* PMBASE dumping now knows the registers. * Add support for i965, i975, ICH8M * Add support for Darwin OS using DirectIO Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3794 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/inteltool/gpio.c')
-rw-r--r--util/inteltool/gpio.c26
1 files changed, 25 insertions, 1 deletions
diff --git a/util/inteltool/gpio.c b/util/inteltool/gpio.c
index 105e77696a..fe8481e2fb 100644
--- a/util/inteltool/gpio.c
+++ b/util/inteltool/gpio.c
@@ -18,7 +18,6 @@
*/
#include <stdio.h>
-#include <sys/io.h>
#include "inteltool.h"
static const io_register_t ich0_gpio_registers[] = {
@@ -78,6 +77,26 @@ static const io_register_t ich7_gpio_registers[] = {
{ 0x3C, 4, "RESERVED" }
};
+static const io_register_t ich8_gpio_registers[] = {
+ { 0x00, 4, "GPIO_USE_SEL" },
+ { 0x04, 4, "GP_IO_SEL" },
+ { 0x08, 4, "RESERVED" },
+ { 0x0c, 4, "GP_LVL" },
+ { 0x10, 4, "GPIO_USE_SEL Override (LOW)" },
+ { 0x14, 4, "RESERVED" },
+ { 0x18, 4, "GPO_BLINK" },
+ { 0x1c, 4, "GP_SER_BLINK" },
+ { 0x20, 4, "GP_SB_CMDSTS" },
+ { 0x24, 4, "GP_SB_DATA" },
+ { 0x28, 4, "RESERVED" },
+ { 0x2c, 4, "GPI_INV" },
+ { 0x30, 4, "GPIO_USE_SEL2" },
+ { 0x34, 4, "GP_IO_SEL2" },
+ { 0x38, 4, "GP_LVL2" },
+ { 0x3C, 4, "GPIO_USE_SEL Override (HIGH)" }
+};
+
+
int print_gpios(struct pci_dev *sb)
{
int i, size;
@@ -87,6 +106,11 @@ int print_gpios(struct pci_dev *sb)
printf("\n============= GPIOS =============\n\n");
switch (sb->device_id) {
+ case PCI_DEVICE_ID_INTEL_ICH8M:
+ gpiobase = pci_read_word(sb, 0x48) & 0xfffc;
+ gpio_registers = ich8_gpio_registers;
+ size = ARRAY_SIZE(ich8_gpio_registers);
+ break;
case PCI_DEVICE_ID_INTEL_ICH7:
case PCI_DEVICE_ID_INTEL_ICH7M:
case PCI_DEVICE_ID_INTEL_ICH7DH: