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authorBenjamin Doron <benjamin.doron00@gmail.com>2021-06-09 20:08:10 +0000
committerMichael Niewöhner <foss@mniewoehner.de>2021-06-12 21:21:16 +0000
commitd593bf7dfe5badb989ad32d920a556eabffaa2ea (patch)
treea98659203b1f45b0df11309156ccc51e0f6d60d0 /util/intelp2m
parent06b2049ab67c305664329b20a673def0f2680af4 (diff)
util/intelp2m/fsp: Fix wrong register decoding for direction and interrupt
Using the wrong registers to build the fields led to incorrect GPIO direction and interrupt trigger values. Change the calls to fix the tables. Change-Id: Icbeeb1fec6a863d0f86659c21924e15ae6765d47 Signed-off-by: Benjamin Doron <benjamin.doron00@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54973 Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/intelp2m')
-rw-r--r--util/intelp2m/fields/fsp/fsp.go4
1 files changed, 2 insertions, 2 deletions
diff --git a/util/intelp2m/fields/fsp/fsp.go b/util/intelp2m/fields/fsp/fsp.go
index 360333afd5..be3cde9dab 100644
--- a/util/intelp2m/fields/fsp/fsp.go
+++ b/util/intelp2m/fields/fsp/fsp.go
@@ -74,7 +74,7 @@ func (FieldMacros) DecodeDW0() {
1 << 4 | 0: "GpioDirInInvOut",
1 << 4 | 1: "GpioDirInInv",
},
- value : dw0.GetRxInvert() << 4 | dw0.GetRXLevelEdgeConfiguration(),
+ value : dw0.GetRxInvert() << 4 | dw0.GetGPIORxTxDisableStatus(),
},
&field {
@@ -116,7 +116,7 @@ func (FieldMacros) DecodeDW0() {
2: "GpioIntLvlEdgDis",
3: "GpioIntBothEdge",
},
- value : dw0.GetResetConfig(),
+ value : dw0.GetRXLevelEdgeConfiguration(),
},
&field {