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authorAlicja Michalska <ahplka19@gmail.com>2024-03-29 14:01:23 +0100
committerFelix Held <felix-coreboot@felixheld.de>2024-04-04 20:21:08 +0000
commitc45d5c8c6be825375dd11c1e18b55b6e3975615f (patch)
treeda4225f8d9338430cc5594402c794ffa9dc9c371 /util/intelp2m/main.go
parentce88ae517666e6a6b3391b661b7c16cbf48de9cf (diff)
util/intelp2m: Add support for TigerLake-H SoC
Add support for TigerLake Halo SoC, based on CNL profile. Test: Convert GPIO dump from inteltool into coreboot macros for out-of-tree TGL board. Change-Id: I26eff225c2045edfe5836283be7b4c63f6b405e8 Signed-off-by: Alicja Michalska <ahplka19@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81587 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Maxim <max.senia.poliak@gmail.com>
Diffstat (limited to 'util/intelp2m/main.go')
-rw-r--r--util/intelp2m/main.go1
1 files changed, 1 insertions, 0 deletions
diff --git a/util/intelp2m/main.go b/util/intelp2m/main.go
index b3835ff7c5..64db9fee5a 100644
--- a/util/intelp2m/main.go
+++ b/util/intelp2m/main.go
@@ -70,6 +70,7 @@ func main() {
"\tlbg - Lewisburg PCH with Xeon SP\n"+
"\tapl - Apollo Lake SoC\n"+
"\tcnl - CannonLake-LP or Whiskeylake/Coffeelake/Cometlake-U SoC\n"+
+ "\ttgl - TigerLake-H SoC\n"+
"\tadl - AlderLake PCH\n"+
"\tjsl - Jasper Lake SoC\n")