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author | Felix Held <felix-coreboot@felixheld.de> | 2022-05-04 17:43:46 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-05-06 13:35:55 +0000 |
commit | dd14a623b14032fccb7ea2c5b8e1a7f10f762a6f (patch) | |
tree | 72f77a0aca4044014cec9bd4e8f183a57fbc8e23 /util/intelmetool | |
parent | 2e4b95da88a5f72269956e34ecaa183cdca48f79 (diff) |
soc/amd/common/include/espi: reduce visibility of IO/MMIO decode defines
The eSPI decode range defines aren't and shouldn't be used directly from
outside of the common AMD eSPI code which provides functions to abstract
the register access, so move the defines from amdblocks/espi.h to
espi_def.h inside the common AMD LPC/eSPI support directory to limit the
visibility. The special I/O range decode bits need to stay in
amdblocks/espi.h since those are used in the devicetree. Also update the
indentation in espi_def.h so that the defines line up properly.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ic4ea30a1a6f10e94d88bf3b29f86dee2da6b39b5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64053
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/intelmetool')
0 files changed, 0 insertions, 0 deletions