summaryrefslogtreecommitdiff
path: root/util/intelmetool/intelmetool.h
diff options
context:
space:
mode:
authorFelix Held <felix-coreboot@felixheld.de>2021-06-18 16:33:49 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-06-21 15:15:09 +0000
commitea668d74f390dd058625e85dbefe89eef4ba6245 (patch)
tree5b2f113c4e7d441ee44d28d8178d43c1d888ccb1 /util/intelmetool/intelmetool.h
parentd6d87767cbf65f0da46bff32534b9718adcc332b (diff)
soc/amd/cezanne/fsp_m_params: set SATA enable UPD from devicetree info
Currently the FSP only has one switch to disable both AHCI controllers. If at least one of the two AHCI controller devices is enabled in the board's devicetree, set the SATA enable UPD to 1 and otherwise set it to 0. Setting the UPD value to 0 when both AHCI controllers are disabled saves around 60ms in boot time. BUG=b:191385289 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I84e7c8bf2ab08c8254271ddfefd2e4e7d8c2e87b Reviewed-on: https://review.coreboot.org/c/coreboot/+/55669 Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Matt Papageorge <matthewpapa07@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/intelmetool/intelmetool.h')
0 files changed, 0 insertions, 0 deletions