diff options
| author | Furquan Shaikh <furquan@chromium.org> | 2017-02-11 12:02:40 -0800 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2017-02-16 08:42:38 +0100 |
| commit | 231c198e2ce56741c945149a6c553b1f4e81a4e2 (patch) | |
| tree | 8f1b35fa5c50e549c0f71fbdae1331b0d05268cb /util/gitconfig/cborg2cros.py | |
| parent | 20a91c9830eaa74ee58cfccb59193671949eb086 (diff) | |
mainboard/google/eve: Generate FPC device using SPI SSDT generator
Use the newly added SPI SSDT generator for adding FPC device.
BUG=chrome-os-partner:59832
BRANCH=None
TEST=Compiles successfully. Verified that the SSDT entry matches the
entry in mainboard.asl
Change-Id: I1b3c33f2b4337735a9725dd4eb6193b2455962d7
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/18343
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'util/gitconfig/cborg2cros.py')
0 files changed, 0 insertions, 0 deletions