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authorJonathan Neuschäfer <j.neuschaefer@gmx.net>2018-10-29 14:25:05 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-12-03 13:18:04 +0000
commit90fd0727c7c3be143caef7fb397c093a3151ba3b (patch)
tree9432ae44311f7559a6b8617a03bb42dc3051b84e /util/futility
parent6fe488b45fdd3c656b0a9f2858423d20bf374007 (diff)
soc/sifive/fu540: Simplify UART refclk calculation
clock_get_coreclk_khz() already detects whether the PLL or the input clock (hfclk) is used. Tested on HiFive Unleashed. Change-Id: I264977b0de0b81ef74a014984b6d33638ab33f4b Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/c/29334 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Hug <philipp@hug.cx> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'util/futility')
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