diff options
| author | Peter Stuge <peter@stuge.se> | 2008-06-29 01:30:41 +0000 |
|---|---|---|
| committer | Peter Stuge <peter@stuge.se> | 2008-06-29 01:30:41 +0000 |
| commit | 891f1a2650c5b32c65103fa9a5659953fab34157 (patch) | |
| tree | 3eb6ab606677d60773e06e5826596bb78b30396d /util/flashrom | |
| parent | 50e4a095ddff2efd3b780d585960fa928a6d93bb (diff) | |
flashrom: Fix ICH7 non-SPI that broke in r3393
r3393 assumed that ICH7 always used SPI. This patch resets ich7_detected back
to 0 when BOOT BIOS Straps indicate something else than SPI.
Also fixes a build error in ichspi.c with gcc 4.2.2.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3395 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/flashrom')
| -rw-r--r-- | util/flashrom/chipset_enable.c | 2 | ||||
| -rw-r--r-- | util/flashrom/ichspi.c | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/util/flashrom/chipset_enable.c b/util/flashrom/chipset_enable.c index d1ab964309..dc6d8bc180 100644 --- a/util/flashrom/chipset_enable.c +++ b/util/flashrom/chipset_enable.c @@ -212,6 +212,8 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, unsign bbs = (gcs >> 10) & 0x3; printf_debug("BOOT BIOS Straps: 0x%x (%s)\n", bbs, (bbs == 0x3) ? "LPC" : ((bbs == 0x2) ? "PCI" : "SPI")); + if (bbs >= 2) + ich7_detected = 0; buc = *(volatile uint8_t *)(rcrb + 0x3414); printf_debug("Top Swap : %s\n", (buc & 1)?"enabled (A16 inverted)":"not enabled"); diff --git a/util/flashrom/ichspi.c b/util/flashrom/ichspi.c index d6c0157e13..b6b0f36fd6 100644 --- a/util/flashrom/ichspi.c +++ b/util/flashrom/ichspi.c @@ -229,7 +229,7 @@ static int ich7_run_opcode(uint8_t nr, OPCODE op, uint32_t offset, { int write_cmd = 0; int timeout; - uint32_t temp32; + uint32_t temp32 = 0; uint16_t temp16; uint32_t a; |