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authorCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2007-12-16 21:15:27 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2007-12-16 21:15:27 +0000
commit3b408fd23794c6d012be79173021e532d1b47ba6 (patch)
treeb6165d021f301eb5736664bc5e1385eb3f084c81 /util/flashrom
parentc9a677b4b31b5c56d953c549e626d3989d7c3623 (diff)
Add support for ST M25P80 chips to flashrom. Detection was tested.
Print status register before erase to help debugging block locks. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3008 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/flashrom')
-rw-r--r--util/flashrom/flash.h5
-rw-r--r--util/flashrom/flashchips.c2
-rw-r--r--util/flashrom/spi.c4
3 files changed, 11 insertions, 0 deletions
diff --git a/util/flashrom/flash.h b/util/flashrom/flash.h
index 2bcdf91041..09e239ea0d 100644
--- a/util/flashrom/flash.h
+++ b/util/flashrom/flash.h
@@ -167,7 +167,12 @@ extern struct flashchip flashchips[];
#define SST_49LF016C 0x5C
#define SST_49LF160C 0x4C
+/*
+ * ST25P chips are SPI, first byte of device ID is memory type, second
+ * byte of device ID is related to log(bitsize) at least for some chips.
+ */
#define ST_ID 0x20 /* ST */
+#define ST_M25P80 0x2014
#define ST_M50FLW040A 0x08
#define ST_M50FLW040B 0x28
#define ST_M50FLW080A 0x80
diff --git a/util/flashrom/flashchips.c b/util/flashrom/flashchips.c
index 72d56192fa..41ae1b1b51 100644
--- a/util/flashrom/flashchips.c
+++ b/util/flashrom/flashchips.c
@@ -140,6 +140,8 @@ struct flashchip flashchips[] = {
probe_jedec, erase_chip_jedec, write_jedec},
{"M29F040B", ST_ID, ST_M29F040B, 512, 64 * 1024,
probe_29f040b, erase_29f040b, write_29f040b},
+ {"M25P80", ST_ID, ST_M25P80, 1024, 64 * 1024,
+ probe_spi, generic_spi_chip_erase, generic_spi_chip_write},
{"82802ab", 137, 173, 512, 64 * 1024,
probe_82802ab, erase_82802ab, write_82802ab},
{"82802ac", 137, 172, 1024, 64 * 1024,
diff --git a/util/flashrom/spi.c b/util/flashrom/spi.c
index 8467664137..8ae6357832 100644
--- a/util/flashrom/spi.c
+++ b/util/flashrom/spi.c
@@ -280,7 +280,11 @@ uint8_t generic_spi_read_status_register()
int generic_spi_chip_erase(struct flashchip *flash)
{
const unsigned char cmd[] = JEDEC_CE_2;
+ uint8_t statusreg;
+ statusreg = generic_spi_read_status_register();
+ printf("chip status register before erase is %02x\n", statusreg);
+
generic_spi_write_enable();
/* Send CE (Chip Erase) */
generic_spi_command(JEDEC_CE_2_OUTSIZE, JEDEC_CE_2_INSIZE, cmd, NULL);