diff options
| author | Jason Wang <Qingpei.Wang@amd.com> | 2008-11-28 21:36:51 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2008-11-28 21:36:51 +0000 |
| commit | f22ce41840ae966a6f465e90c8f05aed9ae5ef6b (patch) | |
| tree | 8cdef566a6d0c3449ab8f12adad0f05e5c6bd4ab /util/flashrom/spi.h | |
| parent | 4ed326be5d7dec9ee16190847ea0b9f42117fe1a (diff) | |
Add support for the AMD/ATI SB600 southbridge SPI functionality.
This has been tested by Uwe Hermann on an RS690/SB600 board.
Signed-off-by: Jason Wang <Qingpei.Wang@amd.com>
Reviewed-by: Joe Bao <zheng.bao@amd.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3779 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/flashrom/spi.h')
| -rw-r--r-- | util/flashrom/spi.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/util/flashrom/spi.h b/util/flashrom/spi.h index c096dce5c6..25ce29774d 100644 --- a/util/flashrom/spi.h +++ b/util/flashrom/spi.h @@ -80,6 +80,11 @@ #define JEDEC_RDSR_INSIZE 0x01 #define JEDEC_RDSR_BIT_WIP (0x01 << 0) +/* Write Status Enable */ +#define JEDEC_EWSR 0x50 +#define JEDEC_EWSR_OUTSIZE 0x01 +#define JEDEC_EWSR_INSIZE 0x00 + /* Write Status Register */ #define JEDEC_WRSR 0x01 #define JEDEC_WRSR_OUTSIZE 0x02 |