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authorStefan Reinauer <stepan@coresystems.de>2008-06-30 23:45:22 +0000
committerStefan Reinauer <stepan@openbios.org>2008-06-30 23:45:22 +0000
commitd9b7ae8becf903e1cb9d66a194f098fd9644b49a (patch)
tree8368f56baa81289f2630d3b12e0bd0a2f52a4c77 /util/flashrom/flash.h
parente16d43c041f0de4b9be0d78e632e968ad865b75b (diff)
First attempt to clean up SPI probing and create a common
construct: the flash bus. At some point the flash bus will be part of struct flashchip. Pardon me for pushing this in, but I think it is important to beware of further decay and it will improve things for other developers in the short run. Carl-Daniel, I will consider your suggestions in another patch. I want to keep things from getting too much for now. The patch includes Rudolf's VIA SPI changes though. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3401 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/flashrom/flash.h')
-rw-r--r--util/flashrom/flash.h15
1 files changed, 11 insertions, 4 deletions
diff --git a/util/flashrom/flash.h b/util/flashrom/flash.h
index eb8b8ebd0c..edd507f0c9 100644
--- a/util/flashrom/flash.h
+++ b/util/flashrom/flash.h
@@ -370,10 +370,17 @@ void print_supported_boards(void);
/* chipset_enable.c */
int chipset_flash_enable(void);
void print_supported_chipsets(void);
-extern int ich7_detected;
-extern int viaspi_detected;
-extern int ich9_detected;
-extern void *ich_spibar;
+
+typedef enum {
+ BUS_TYPE_LPC,
+ BUS_TYPE_ICH7_SPI,
+ BUS_TYPE_ICH9_SPI,
+ BUS_TYPE_IT87XX_SPI,
+ BUS_TYPE_VIA_SPI
+} flashbus_t;
+
+extern flashbus_t flashbus;
+extern void *spibar;
/* Physical memory mapping device */
#if defined (__sun) && (defined(__i386) || defined(__amd64))