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authorRonald Hoogenboom <hoogenboom30@zonnet.nl>2008-01-19 00:04:46 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2008-01-19 00:04:46 +0000
commit2f0f561f899b6c0faf964202045e196b0876e849 (patch)
tree3757b1baa119b961ecc276e85d338699b6004c83 /util/flashrom/flash.h
parentcd474afd08356bb4dbc7f0b73e9927c05defe3d8 (diff)
Support SPI flash chips bigger than 512 kByte sitting behind IT8716F
Super I/O performing LPC-to-SPI flash translation. Signed-off-by: Ronald Hoogenboom <hoogenboom30@zonnet.nl> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3061 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/flashrom/flash.h')
-rw-r--r--util/flashrom/flash.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/util/flashrom/flash.h b/util/flashrom/flash.h
index dffb1b8036..048f7440f0 100644
--- a/util/flashrom/flash.h
+++ b/util/flashrom/flash.h
@@ -234,7 +234,16 @@ extern struct flashchip flashchips[];
#define TI_ID 0x97 /* Texas Instruments */
+/*
+ * W25X chips are SPI, first byte of device ID is memory type, second
+ * byte of device ID is related to log(bitsize).
+ */
#define WINBOND_ID 0xDA /* Winbond */
+#define WINBOND_NEX_ID 0xEF /* Winbond (ex Nexcom) serial flash devices */
+#define W_25X10 0x3011
+#define W_25X20 0x3012
+#define W_25X40 0x3013
+#define W_25X80 0x3014
#define W_29C011 0xC1
#define W_29C020C 0x45
#define W_29C040P 0x46
@@ -297,6 +306,7 @@ void generic_spi_write_enable();
void generic_spi_write_disable();
int generic_spi_chip_erase_c7(struct flashchip *flash);
int generic_spi_chip_write(struct flashchip *flash, uint8_t *buf);
+int generic_spi_chip_read(struct flashchip *flash, uint8_t *buf);
/* 82802ab.c */
int probe_82802ab(struct flashchip *flash);