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| author | Shuo Liu <shuo.liu@intel.com> | 2024-05-16 06:13:10 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-10-02 13:51:22 +0000 |
| commit | 1bebdc0d72516706768ef4752e0a1d953e3639db (patch) | |
| tree | e00f0e2936e7967d942faa960c4d0711710f653a /util/find_usbdebug | |
| parent | bc853b72aca27aba3431be9775373755ea9b6435 (diff) | |
soc/intel/xeon_sp: Use MemoryMapDataHob to add high RAM resources
On GNR, there are CXL Type-3 memory windows covered under TOHM. The
current 4GB to TOHM DRAM reporting doesn't work on GNR.
Use MemoryMapDataHob to add high RAM resources as a generic
mechanism for GNR and previous generation SoCs.
TEST=Build and boot on intel/archercity CRB
TEST=Build and boot on intel/beechnutcity CRB
(with topic:"Xeon6-Basic-Boot")
Change-Id: Ie5fbc5735704d95c7ad50740ff0e35737afdbd80
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84304
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/find_usbdebug')
0 files changed, 0 insertions, 0 deletions