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author | Subrata Banik <subrata.banik@intel.com> | 2020-07-30 11:31:55 +0530 |
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committer | Subrata Banik <subrata.banik@intel.com> | 2020-08-01 06:55:36 +0000 |
commit | 6362de3829c1762632e3aa16b1af0fd0a9a1e625 (patch) | |
tree | 02298fb9fa0c11fc74dc67743a2cdbeaf38d07c5 /util/exynos/description.md | |
parent | 46f807324916f223282e5c8fee1bfe4595eeb1f2 (diff) |
soc/intel/{icl,jsl,tgl}: Remove SkipMpInit UPD as deprecated
FSP default UPD for SkipMpInit is set to 0 which refers to run CPU
feature programming on all cores (BSP + APs).
Setting SkipMpInit=1 is not recommended as it will only limit CPU
feature programming on BSP.
TEST=Able to perform CPU feature programming by FSP on all cores
using external MP PPI services.
Change-Id: I22e70f5f15e53c5fabd78cc3698c4d718b607af6
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44058
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Diffstat (limited to 'util/exynos/description.md')
0 files changed, 0 insertions, 0 deletions