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| author | Lijian Zhao <lijian.zhao@intel.com> | 2017-11-30 10:10:59 -0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-12-20 16:39:19 +0000 |
| commit | 22d20d6f1450e0c6cc86f3903b7546f4e0b706cc (patch) | |
| tree | 689e004ce2a29bbdd285ed59dc25f0fd5d706675 /util/docker/coreboot-sdk | |
| parent | 1731a33e322e3760de2ffb5349923a592ebe97ac (diff) | |
soc/intel/cannonlake: Tell FSPM UART port number
Cannonlake FSP will send debug message on selected UART port, use same
coreboot UART debug port to FSP.
TEST=Boot up with board have UART port 0 and can see the print of FSP
Change-Id: Id72e459d2fbb1f16b005d22fac66667086880384
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/22655
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'util/docker/coreboot-sdk')
0 files changed, 0 insertions, 0 deletions