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authorBrandon Breitenstein <brandon.breitenstein@intel.com>2015-10-27 13:49:14 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-12-03 14:17:30 +0100
commitad77bf93200cba5fd47378cbadfeb467f1fc4740 (patch)
treea5102659d2e81f2aaf40e5f46a64274010aa49ef /util/crossgcc
parentfb622cc4717aa52be95c669e2343709b4c56d923 (diff)
intel/Kunimitsu: FAB 4 SPD changes
Updated Memory IDs and SKU IDs for FAB 4 Updated detection of single/dual channel memory to use SPD Index (Memory ID) Added spd files for new dimms Removed boardid.h as it is no longer needed BUG=None BRANCH=None TEST=Tested on FAB4 SKU1 and SKU3 Change-Id: I60403c0e636ea28797d94cff9431af921631323e Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: ce39dc3b0b9448635f878ce8c1aea5b4743594c4 Original-Change-Id: I870b3dfa2c4f358defb9263e759de477bb32e620 Original-Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/312546 Original-Commit-Ready: Freddy Paul <freddy.paul@intel.com> Original-Tested-by: Freddy Paul <freddy.paul@intel.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-on: https://review.coreboot.org/12590 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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