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| author | Furquan Shaikh <furquan@chromium.org> | 2017-02-11 10:57:23 -0800 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2017-02-16 08:41:28 +0100 |
| commit | 7606c377f56ab68421aa482b1ded6840d426e197 (patch) | |
| tree | e25c60cc8e33127ce9193c7190ff8e1299d173fd /util/crossgcc | |
| parent | e67002968b6ebc69c5a94fb2cee17af3845268c9 (diff) | |
device: Add a new "SPI" device type
Add support for a new "SPI" device type in the devicetree to bind a
device on the SPI bus. Allow device to provide chip select number for
the device as a parameter.
Add spi_bus_operations with operation dev_to_bus which allows SoCs to
define a translation method for converting "struct device" into a unique
SPI bus number.
BUG=chrome-os-partner:59832
BRANCH=None
TEST=Compiles successfully.
Change-Id: I86f09516d3cddd619fef23a4659c9e4eadbcf3fa
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/18340
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'util/crossgcc')
0 files changed, 0 insertions, 0 deletions