aboutsummaryrefslogtreecommitdiff
path: root/util/crossgcc
diff options
context:
space:
mode:
authorLijian Zhao <lijian.zhao@intel.com>2017-09-26 13:56:24 -0700
committerAaron Durbin <adurbin@chromium.org>2017-10-03 20:24:42 +0000
commited3e6b8b946e0c5fbc417551750da67c284eaf8b (patch)
treed91520a8122ca71345e53427817e9c78accdc768 /util/crossgcc
parent5d11cc9d7e0ee016d6b6c540d010b212291d61cd (diff)
soc/intel/cannonlake: Disable CPU ratio override
Disable CPU Ratio override as input to FSP Memory init. Change-Id: I4a1df15c619038f17c1bef5b7f53d322e352c56b Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/21709 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'util/crossgcc')
0 files changed, 0 insertions, 0 deletions