diff options
| author | Lee Leahy <leroy.p.leahy@intel.com> | 2017-05-24 13:23:26 -0700 |
|---|---|---|
| committer | Lee Leahy <leroy.p.leahy@intel.com> | 2017-06-20 18:11:07 +0200 |
| commit | d9351099ef5ca58a6153da1b782178bda22bc879 (patch) | |
| tree | 9ba7393c6a9083d094f5d9c4fc80f61c1316d56e /util/crossgcc/sum/Python-3.5.1.tar.xz.cksum | |
| parent | 0cae6e9e5d1be31daf80894dbf5f01880c786bbb (diff) | |
soc/intel/quark: Add legacy SPI flash controller driver
Add SPI driver code for the legacy SPI flash controller. Enable erase
and write support allowing coreboot to save non-volatile data into
the SPI flash.
TEST=Build and run on Galileo Gen2.
Change-Id: I8f38c955d7c42a1e58728c728d0cecc36556de5c
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/20231
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'util/crossgcc/sum/Python-3.5.1.tar.xz.cksum')
0 files changed, 0 insertions, 0 deletions