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| author | Raul E Rangel <rrangel@chromium.org> | 2018-05-16 11:45:38 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-05-22 07:13:46 +0000 |
| commit | a305afb62ca4215e589d44123c22c9303cf8cef2 (patch) | |
| tree | 67bb7120d5dc1552043768a5e332f1ffcfa50356 /util/crossgcc/patches/gcc-6.3.0_riscv.patch | |
| parent | fceac7ed5d9d730c04949e46e6950dc505789948 (diff) | |
stonyridge: Add TP_Perf_STRUCT struct
The TP_Perf_STRUCT was missing from pi/00670F00. So I copied the file
from src/vendorcode/amd/pi/00630F01/Include/IdsPerf.h and removed
everything that we don't need. I did have to change
MAX_PERFORMANCE_UNIT_NUM so it matches the size used by pi/00670F00.
This struct is used to extract the timestamps from AGESA.
BUG=b:64549506
TEST=built on grunt
Change-Id: I06ec82348e3d10f2430c1192a925a49389ae4414
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-on: https://review.coreboot.org/26235
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/crossgcc/patches/gcc-6.3.0_riscv.patch')
0 files changed, 0 insertions, 0 deletions