soc/intel/tigerlake: Add PCH PCIe RPs wake up events to event log

All wakes by a PCH PCIe root port were lumped under one event source;
this commit splits them up so each root port gets its own ID in the
event log.

BUG=b:172279061
BRANCH=volteer

Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: Icebcac3b69c605ecf6df37733b641397ea3c3ad0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47182
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>

0 files changed, 0 insertions, 0 deletions