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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2019-01-05 09:58:39 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-07 10:32:06 +0000 |
| commit | e7dd3ca40504272ede602fe868275c70f3a61ee8 (patch) | |
| tree | c05597afabf23de75d4b0c9d687a681a2c9018d5 /util/crossgcc/buildgcc | |
| parent | 5493b4543d80e6cabe4ce60341f0a02f1711da66 (diff) | |
sb/intel/fsp_rangeley: Fix typo in GPIO Level
Change-Id: I83886820b8c1acceb2007b694361fe8c30c34f7f
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/30675
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: David Guckian
Diffstat (limited to 'util/crossgcc/buildgcc')
0 files changed, 0 insertions, 0 deletions