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author | Werner Zeh <werner.zeh@siemens.com> | 2021-05-31 07:15:36 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2021-06-04 12:39:57 +0000 |
commit | a67bda339e6f6bf301976c575901dcab0a1f5ffc (patch) | |
tree | 043edc5e1398451ed26afcc2eb6accdf722b74c7 /util/chromeos | |
parent | 1e02ad3f5a14c6f6a9c34bf2e3ca0eed8f34af1d (diff) |
mb/siemens/mc_apl{1,2,3,5,6}: Provide I2C timings for 400 kHz
The I2C bus at which the external RTC is attached to is operated at
standard speed (100 kHz) at coreboot runtime. The OS can choose to run it
at fast speed since it uses its own driver and controller setup.
Report additional bus timings for fast mode so that OS can do it right.
Change-Id: I82e11e5dde8ad1047713f105c5a6d020eebf1ffd
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55089
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/chromeos')
0 files changed, 0 insertions, 0 deletions