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author | Nina Wu <nina-cm.wu@mediatek.com> | 2021-11-05 15:23:16 +0800 |
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committer | Patrick Georgi <patrick@coreboot.org> | 2021-12-06 12:39:56 +0000 |
commit | e138fbd794b2d565342db8939291a32d4422710d (patch) | |
tree | 0a174b4658a2f3e95662b4c3f2a4d20164dd75a0 /util/cbfstool | |
parent | 93f50b35a4f89e0c514d29f27674ffedca46c08a (diff) |
soc/mediatek/mt8195: complete devapc settings
In previous patch (CB:56764), only basic settings were added.
Now complete devapc settings on MT8195.
1. Update permission setting
2. Updtate master domain setting:
- domain 1: PCIE0, PCIE1
- domain 2: SPM, SSPM, CPU_EB
3. Set domain remap
- MMSYS (4-bit to 2-bit)
- TINYSYS (4-bit to 3-bit)
- TINYSYS (3-bit to 4-bit)
- TINYSYS to EMI (3-bit to 4-bit)
- INFRA2 (3-bit to 4-bit)
4. Set SCP domain and ADSP domain
- domain 3: SCP
- domain 4: ADSP
BUG=b:204347737
TEST=sanity test pass
Change-Id: I1846d56d2dc362de64b28e0ed9a0681f186af7ee
Signed-off-by: Nina Wu <nina-cm.wu@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59746
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/cbfstool')
0 files changed, 0 insertions, 0 deletions