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authorJeremy Compostella <jeremy.compostella@intel.com>2022-09-08 16:53:15 -0700
committerFelix Held <felix-coreboot@felixheld.de>2022-09-15 13:01:13 +0000
commit2c021383c0ab847c927e8e964c3f55dd4d6deb0c (patch)
tree31ad6695002d3a02b28a366dfea5f832be2db11d /util/cbfstool/common.c
parent3ed3138eeb2b1154eb3d540e587f04c14b906c3b (diff)
cpu/intel/haswell: Allow up to six microcodes in the FIT table
Haswell and Broadwell platforms usually stitch six microcode patches. It has worked so far with the default value of four thanks a bug which is being fixed by `util/ifittool: Error out if microcodes do not fit the FIT table' commit. BUG=b:245380705 TEST=Jenkins build without failing on the FIT table size Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com> Change-Id: I23bf79a3e8918499f6c51e6ef829312d5872181a Reviewed-on: https://review.coreboot.org/c/coreboot/+/67466 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'util/cbfstool/common.c')
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