diff options
author | Maximilian Schander <coreboot@mimoja.de> | 2017-11-05 05:52:13 +0100 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2017-11-08 11:42:20 +0000 |
commit | 98c11ddc9e95f15a8c10b212e9bfc1180dc83369 (patch) | |
tree | c2cff812ab78f357624bc91722f23ffd373836fb /util/cbfstool/coff.h | |
parent | bf9429252264a31d7b3aa87967031aa83b0f529f (diff) |
util/inteltool: Add Skylake DMIBAR register dumping
Register definitions were taken from
* 6th Generation Intel Processor Families for S-Platform Volume 2 of 2
* Page 117
* 332688-003EN
As well as
* 6th Generation Intel Processor Families for H-Platform Volume 2 of 2
* Page 117
* 332987-002EN
Tested on a 6th gen skylake mobile cpu and capability registers do match up
with the default values.
Change-Id: I636f6c3d045e297f1439d3e88e43f41e03db4c8e
Signed-off-by: Maximilian Schander <coreboot@mimoja.de>
Reviewed-on: https://review.coreboot.org/22345
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'util/cbfstool/coff.h')
0 files changed, 0 insertions, 0 deletions