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| author | Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> | 2023-07-04 10:23:58 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-07-05 12:54:13 +0000 |
| commit | 8d0a063810136672b3c27fbd092afc654951bf1b (patch) | |
| tree | 6eddcb02fb8671aa593022241ee07aa7b00fbe8c /util/board_status/go/src | |
| parent | 969a2a9a30a2d2c0ec855b832ea32b706fb4b4b2 (diff) | |
soc/intel/meteorlake: Set TCC to 90°C
Set tcc_offset value to 20 in chipset for Thermal Control
Circuit (TCC) activation feature for meteorlake silicon.
Also, remove tcc_offset default value from rex baseboard
and variants.
BUG=b:270664854
BRANCH=None
TEST=Build FW and test on rex board
Change-Id: Ieec1b7e0873eef46a56e612ed1d9445019b1f4a9
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76232
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'util/board_status/go/src')
0 files changed, 0 insertions, 0 deletions