diff options
| author | Keith Hui <buurin@gmail.com> | 2023-11-11 17:25:48 -0500 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-08-26 11:08:14 +0000 |
| commit | b4f47e8067a7ef55ad5e2f18058031a871edbfef (patch) | |
| tree | 1a6046ce808e6a03070a66efcf125cbc74b8cb17 /util/autoport | |
| parent | e9ed7928cf31312629b30acd6a1788a64f547baf (diff) | |
nb/intel/haswell: Move SPD addresses to devicetree
Introduce a sandybridge-style devicetree setting for SPD addresses,
and use it instead of runtime code in mb_get_spd_map() for all
haswell boards without CONFIG(HAVE_SPD_IN_CBFS) - effectively all
boards except google/slippy.
Patch also covers recently added Z97 boards using Broadwell MRC.
Also update util/autoport to match.
abuild passes for all affected boards.
autoport builds, but otherwise untested.
Change-Id: I574aec9cb6a47c8aaf275ae06c7e1fb695534b34
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79025
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/autoport')
| -rw-r--r-- | util/autoport/haswell.go | 1 | ||||
| -rw-r--r-- | util/autoport/lynxpoint.go | 10 |
2 files changed, 1 insertions, 10 deletions
diff --git a/util/autoport/haswell.go b/util/autoport/haswell.go index 588d2710fa..668771b754 100644 --- a/util/autoport/haswell.go +++ b/util/autoport/haswell.go @@ -65,6 +65,7 @@ func (i haswellmc) Scan(ctx Context, addr PCIDevData) { "usb_xhci_on_resume": "false", /* FIXME:XX hardcoded. */ "gfx": "GMA_STATIC_DISPLAYS(0)", + "spd_addresses": "{0x50, 0x51, 0x52, 0x53}\" # FIXME: Put proper SPD map here", }, Children: []DevTreeNode{ { diff --git a/util/autoport/lynxpoint.go b/util/autoport/lynxpoint.go index 98a1ca8248..7168686cdb 100644 --- a/util/autoport/lynxpoint.go +++ b/util/autoport/lynxpoint.go @@ -272,7 +272,6 @@ void mainboard_config_superio(void) Add_gpl(sb) sb.WriteString(`#include <stdint.h> #include <northbridge/intel/haswell/haswell.h> -#include <northbridge/intel/haswell/raminit.h> #include <southbridge/intel/lynxpoint/pch.h> void mainboard_config_rcba(void) @@ -284,15 +283,6 @@ void mb_late_romstage_setup(void) { } -void mb_get_spd_map(struct spd_info *spdi) -{ - /* FIXME: check this */ - spdi->addresses[0] = 0x50; - spdi->addresses[1] = 0x51; - spdi->addresses[2] = 0x52; - spdi->addresses[3] = 0x53; -} - const struct usb2_port_config mainboard_usb2_ports[MAX_USB2_PORTS] = { /* FIXME: Length and Location are computed from IOBP values, may be inaccurate */ /* Length, Enable, OCn#, Location */ |