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authorV Sowmya <v.sowmya@intel.com>2020-11-06 13:47:04 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-11-07 08:55:15 +0000
commit73caae977213b8d25616dcaa043259c7b2dc2a60 (patch)
tree7cc68401507ecaaf3a6f0ed118cfb93f5672aae0 /util/amdtools
parent14e34fb10b52ddf078f45d6b5791b285a8d4eee1 (diff)
mb/intel/adlrvp: Enable TCSS xDCI, TBT PCIe RP and DMA controllers
This patch enables TCSS xDCI, TBT PCIe root ports and DMA controllers for ADLRVP. BUG=b:170607415 TEST=Built and booted on ADLRVP. Change-Id: Iabd6cc7c589d1c20cde9d66c0a63e2cf16316b33 Signed-off-by: V Sowmya <v.sowmya@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47288 Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/amdtools')
0 files changed, 0 insertions, 0 deletions