diff options
| author | Andrey Petrov <andrey.petrov@intel.com> | 2016-11-04 16:18:30 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-11-30 16:46:52 +0100 |
| commit | 96e9ff168ca52f3bb06606b65fb07ba5e4e7bb50 (patch) | |
| tree | 40cefbdb8c1c84c563252b045fef9ea297cc67d6 /util/amdtools/example_input/lspci-prop-48G-667MHz-18.2 | |
| parent | ef9a9ea3b7585354d447ab0b3145e1b357226647 (diff) | |
soc/intel/apollolake: Add save/restore variable MRC cache
Apollolake MRC cache is divided into two regions: constant and variable.
Currently they are clubbed together. Since variable data changes across
cold reboot it triggers invalidation of the whole cache region. This
change declubs the data, adds routines to load/store variable data on
flash.
BUG=chrome-os-partner:57515
TEST=with patch series applied: cold reboot, make sure MRC is not
updated. Do S3 suspend/resume cycle.
Change-Id: I374519777abe9b9a1e6cceae5318decd405bb527
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/17237
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'util/amdtools/example_input/lspci-prop-48G-667MHz-18.2')
0 files changed, 0 insertions, 0 deletions