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authorRitul Guru <ritul.bits@gmail.com>2022-07-29 11:06:40 +0530
committerFelix Held <felix-coreboot@felixheld.de>2022-08-26 16:04:51 +0000
commit9a321f31c8601ce7396f60e334844df30bab02ad (patch)
tree71bac6f1d66052c14bffc6ab6708dba9eae2deb7 /util/amdfwtool/amdfwtool.c
parent1233c43a983f0e05cf19c670b790d5e0fe66e2af (diff)
util/amdfwtool: Add changes to reserve BIOS SIG
changes to reserve space for AMD_BIOS_SIG when BIOS image is signed with RTMSignature. Change-Id: Ia832fe83a3e29279c029fefc934c3ef4d335e2ea Signed-off-by: Ritul Guru <ritul.bits@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66259 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'util/amdfwtool/amdfwtool.c')
-rw-r--r--util/amdfwtool/amdfwtool.c24
1 files changed, 24 insertions, 0 deletions
diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c
index 548714353f..6d5d486169 100644
--- a/util/amdfwtool/amdfwtool.c
+++ b/util/amdfwtool/amdfwtool.c
@@ -291,6 +291,7 @@ amd_fw_entry amd_fw_table[] = {
amd_bios_entry amd_bios_table[] = {
{ .type = AMD_BIOS_RTM_PUBKEY, .inst = 0, .level = BDT_BOTH },
+ { .type = AMD_BIOS_SIG, .inst = 0, .level = BDT_BOTH },
{ .type = AMD_BIOS_APCB, .inst = 0, .level = BDT_BOTH },
{ .type = AMD_BIOS_APCB, .inst = 1, .level = BDT_BOTH },
{ .type = AMD_BIOS_APCB, .inst = 2, .level = BDT_BOTH },
@@ -1007,6 +1008,7 @@ static void integrate_bios_firmwares(context *ctx,
if (!(fw_table[i].level & level))
continue;
if (fw_table[i].filename == NULL && (
+ fw_table[i].type != AMD_BIOS_SIG &&
fw_table[i].type != AMD_BIOS_APOB &&
fw_table[i].type != AMD_BIOS_APOB_NV &&
fw_table[i].type != AMD_BIOS_L2_PTR &&
@@ -1016,6 +1018,10 @@ static void integrate_bios_firmwares(context *ctx,
/* BIOS Directory items may have additional requirements */
+ /* SIG needs a size, else no choice but to skip */
+ if (fw_table[i].type == AMD_BIOS_SIG && !fw_table[i].size)
+ continue;
+
/* Check APOB_NV requirements */
if (fw_table[i].type == AMD_BIOS_APOB_NV) {
if (!fw_table[i].size && !fw_table[i].src)
@@ -1072,6 +1078,17 @@ static void integrate_bios_firmwares(context *ctx,
biosdir->entries[count].subprog = fw_table[i].subpr;
switch (fw_table[i].type) {
+ case AMD_BIOS_SIG:
+ /* Reserve size bytes within amdfw.rom */
+ biosdir->entries[count].size = fw_table[i].size;
+ biosdir->entries[count].source = RUN_CURRENT(*ctx);
+ biosdir->entries[count].address_mode =
+ SET_ADDR_MODE_BY_TABLE(biosdir);
+ memset(BUFF_CURRENT(*ctx), 0xff,
+ biosdir->entries[count].size);
+ ctx->current = ALIGN(ctx->current
+ + biosdir->entries[count].size, 0x100U);
+ break;
case AMD_BIOS_APOB:
biosdir->entries[count].size = fw_table[i].size;
biosdir->entries[count].source = fw_table[i].src;
@@ -1232,6 +1249,7 @@ enum {
LONGOPT_SPI_READ_MODE = 256,
LONGOPT_SPI_SPEED = 257,
LONGOPT_SPI_MICRON_FLAG = 258,
+ LONGOPT_BIOS_SIG = 259,
};
static char const optstring[] = {AMDFW_OPT_CONFIG, ':',
@@ -1266,6 +1284,7 @@ static struct option long_options[] = {
{"bios-bin-src", required_argument, 0, AMDFW_OPT_BIOSBIN_SOURCE },
{"bios-bin-dest", required_argument, 0, AMDFW_OPT_BIOSBIN_DEST },
{"bios-uncomp-size", required_argument, 0, AMDFW_OPT_BIOS_UNCOMP_SIZE },
+ {"bios-sig-size", required_argument, 0, LONGOPT_BIOS_SIG },
{"ucode", required_argument, 0, AMDFW_OPT_UCODE },
{"apob-nv-base", required_argument, 0, AMDFW_OPT_APOB_NVBASE },
{"apob-nv-size", required_argument, 0, AMDFW_OPT_APOB_NVSIZE },
@@ -1620,6 +1639,11 @@ int main(int argc, char **argv)
register_fw_addr(AMD_BIOS_BIN, 0, 0, optarg);
sub = instance = 0;
break;
+ case LONGOPT_BIOS_SIG:
+ /* BIOS signature size */
+ register_fw_addr(AMD_BIOS_SIG, 0, 0, optarg);
+ sub = instance = 0;
+ break;
case AMDFW_OPT_UCODE:
register_bdt_data(AMD_BIOS_UCODE, sub,
instance, optarg);