diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2023-07-13 11:40:08 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-08-21 12:11:57 +0000 |
| commit | 563f7afa0481bfe0d194467b80404eb32e8a4d44 (patch) | |
| tree | b064b77c39283fd4b6bba68fc4ae8c3dc0a5ec74 /util/amdfwtool/amdfwtool.c | |
| parent | 6603605d75bb2750baa1047ea9dbb9f4fdbb2197 (diff) | |
util/amdfwtool: Add Genoa support
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I83e3c383faec0fd7b2cf768b7a4c237edd986666
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76469
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Diffstat (limited to 'util/amdfwtool/amdfwtool.c')
| -rw-r--r-- | util/amdfwtool/amdfwtool.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index 1b2b0054b5..9a7d0bd083 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -706,6 +706,7 @@ static void fill_psp_directory_to_efs(embedded_firmware *amd_romsig, void *pspdi case PLATFORM_PICASSO: case PLATFORM_LUCIENNE: case PLATFORM_RENOIR: + case PLATFORM_GENOA: default: /* for combo, it is also combo_psp_directory */ amd_romsig->new_psp_directory = @@ -721,6 +722,7 @@ static void fill_bios_directory_to_efs(embedded_firmware *amd_romsig, void *bios case PLATFORM_RENOIR: case PLATFORM_LUCIENNE: case PLATFORM_CEZANNE: + case PLATFORM_GENOA: if (!cb_config->recovery_ab) amd_romsig->bios3_entry = BUFF_TO_RUN_MODE(*ctx, biosdir, AMD_ADDR_REL_BIOS); @@ -802,6 +804,9 @@ static uint32_t get_psp_id(enum platform soc_id) case PLATFORM_PHOENIX: psp_id = 0xBC0D0400; break; + case PLATFORM_GENOA: + psp_id = 0xBC0C0111; + break; case PLATFORM_CARRIZO: default: psp_id = 0; @@ -1772,6 +1777,7 @@ static int set_efs_table(uint8_t soc_id, amd_cb_config *cb_config, case PLATFORM_MENDOCINO: case PLATFORM_PHOENIX: case PLATFORM_GLINDA: + case PLATFORM_GENOA: amd_romsig->spi_readmode_f17_mod_30_3f = efs_spi_readmode; amd_romsig->spi_fastspeed_f17_mod_30_3f = efs_spi_speed; switch (efs_spi_micron_flag) { |