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authorYilin Yang <kerker@google.com>2020-09-16 16:01:40 +0800
committerHung-Te Lin <hungte@chromium.org>2020-09-18 13:30:05 +0000
commit46eaa5a1bac3c1fbd7c84bd2f609736eb6aa50fb (patch)
tree7c9773e58710180c2956ec2ae440be3d9ded31fa /util/README.md
parent12beaea5e21e0e4db2608840cc78b8bee04320c8 (diff)
util/rockchip: Port make_idb.py to python3
BUG=chromium:1023662 TEST=buildbot pass TEST=1. Use python2 script 2. Run `emerge-kevin coreboot` twice, so we get bootblock.bin.1 and bootblock.bin.2 3. Run `xxd` on these two bootblock so we get bootblock.bin.1.hex and bootblock.bin.2.hex 4. `diff bootblock.bin.1.hex bootblock.bin.2.hex` and record the difference. (at least, the time info changes) 5. Migrate to python3 6. Similar steps, we get bootblock.bin.py3.hex 7. `diff bootblock.bin.1.hex bootblock.bin.py3.hex`, the difference is similar. (time info, git hash changes) Signed-off-by: Yilin Yang <kerker@google.com> Change-Id: I04253084ec9b65310c52598b629390051cd2172b Reviewed-on: https://review.coreboot.org/c/coreboot/+/45447 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@@ -83,7 +83,7 @@ devices on the board such as dGPU. `C`
can be passed to SPIKE, the RISC-V reference emulator.`Bash`
* _sifive-gpt.py_ - Wraps the bootblock in a GPT partition for
SiFive's bootrom. `Python3`
-* __rockchip__ - Generate Rockchip idblock bootloader. `Python2`
+* __rockchip__ - Generate Rockchip idblock bootloader. `Python3`
* __sconfig__ - coreboot device tree compiler `Lex` `Yacc`
* __scripts__
* _config_ - Manipulate options in a .config file from the