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authorRizwan Qureshi <rizwan.qureshi@intel.com>2017-02-10 15:58:24 +0530
committerMartin Roth <martinroth@google.com>2017-03-22 17:43:47 +0100
commitffe58107df667b5142e3c3efd25c1ee3360038bf (patch)
tree9bd3c7ec4b2bade0ef4f8ad25ea71fa91ab90e93 /toolchain.inc
parent63755128961089deba77413dad1f4f6d349a68f5 (diff)
soc/intel/skylake: Add option to disable host reads to PMC XRAM
FSP disables host access to shadowed PMC XRAM registers by default, it also provides a UPD to enable/disable host reads to these regiters. Expose the same in devicetree as a config option. Change-Id: Iaa33aa3233bda4f050da37d1d8af0556311c9496 Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-on: https://review.coreboot.org/18319 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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