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authorRavi Sarawadi <ravishankar.sarawadi@intel.com>2016-09-09 14:08:50 -0700
committerAaron Durbin <adurbin@chromium.org>2016-10-16 02:52:48 +0200
commita52f883b100f3229dd4d86c81c08781993861f73 (patch)
tree349aea8ff41aff195dba41561369dd4d6ccea35a /toolchain.inc
parent63583f09872e26edb80fd891547d128abe4c6df9 (diff)
soc/apollolake: Add soc core init
Skip FSP initiated core/MP init as it is implemented and initiated in coreboot. Add soc core init to set up the following feature MSRs: 1. C-states 2. IO/Mwait redirection BUG=chrome-os-partner:56922 BRANCH=None TEST= Check C-state functioning using 'powertop'. Check 0xE2 and 0xE4 MSR to verify IO/Mwait redirection. Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com> Change-Id: I97c3d82f654be30a0d2d88cb68c8212af3d6f767 Reviewed-on: https://review.coreboot.org/16587 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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