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authorFelix Held <felix-coreboot@felixheld.de>2022-01-10 23:37:58 +0100
committerPaul Fagerburg <pfagerburg@chromium.org>2022-01-14 00:29:52 +0000
commit62afdb675a49bfebbdd4f186f696c15a56d64348 (patch)
tree50fa03f35315cb3e6e13c3960bd1b6d5c0aae288 /tests/stubs
parent45b6080561748fe579c8ee901811cf4043383c2f (diff)
soc/amd/cezanne: factor out eSPI SPI2 pads configuration functions
verstage_mainboard_espi_init in mb/guybrush/verstage.c still accesses some of the registers directly. BUG=b:183149183 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I2f48d1c62b48866d8d942f1586bcb72017b8dd72 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60983 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kangheui Won <khwon@chromium.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
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