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| author | Jeremy Compostella <jeremy.compostella@intel.com> | 2023-03-13 10:55:21 -0700 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2023-04-07 04:50:59 +0000 |
| commit | c49efa365e1e1f07db8f208f4a63f27ca81e290d (patch) | |
| tree | 50dd1aa6f86203effc171201d31ce994a6e09cc6 /tests/lib/bootmem-test.c | |
| parent | 1d79188dc502da444db5874d303ef581a6ea6017 (diff) | |
mb/google/brya: Enable asynchronous End-Of-Post
Set the `SOC_INTEL_CSE_SEND_EOP_ASYNC' flag to request End-Of-Post
right after PCI enumeration and handle the command response at
`BS_PAYLOAD_BOOT'.
With these settings we have observed a boot time reduction of about 20
to 30 ms on brya0.
BUG=b:268546941
BRANCH=firmware-brya-14505.B
TEST=Tests on brya0 with `SOC_INTEL_CSE_SEND_EOP_ASYNC' show
End-Of-Post after PCI initialization and EOP message received at
`BS_PAYLOAD_BOOT'.
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Change-Id: Ib850330fbb9e84839eb1093db054332cbcb59b41
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74215
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'tests/lib/bootmem-test.c')
0 files changed, 0 insertions, 0 deletions