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authorSridhar Siricilla <sridhar.siricilla@intel.com>2021-04-07 10:18:43 +0530
committerPatrick Georgi <pgeorgi@google.com>2021-04-09 06:27:00 +0000
commitedc6da2de9cc491a03cfa335879829efb0446b74 (patch)
treee18d303975b57581b1dc578fe979bb75ecee353c /tests/device/i2c-test.c
parent09446778e899fa923895f5690481a509479c6641 (diff)
mb/intel/adlrvp: Enable HECI1 communication
The patch enables HECI1 interface to allow OS applications to communicate with CSE. BUG=None TEST=Build and boot ADLRVP. Run lspci and check pcie device (00:16.0) Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Change-Id: I34ff842481bdfc7933a76555ff0fd70f4fbbb9a7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52149 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Diffstat (limited to 'tests/device/i2c-test.c')
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