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authorRichard Smith <smithbone@gmail.com>2006-07-24 04:25:47 +0000
committerRichard Smith <smithbone@gmail.com>2006-07-24 04:25:47 +0000
commitcb8eab482ff09ec256456312ef2d6e7710123551 (patch)
tree7bc1297911194e564b967efba4a03c4dde5f7a13 /targets
parent4788effb045ae1f71d89c78a0b16a93d5ba79e89 (diff)
add framework for i440bx chipset
add support for NSC pc87351 SuperIO add Bitworks/IMS manboard config This is a very basic framework for the i440bx chipset and the Bitworks IMS board that uses it. Most things are structure only. Known issues: - SMbus reads to the RAM SPD come back all zero. - dump_spd_registers() is commented out since it breaks with the default setting of generic_dump_spd.c where it wants 2 memory controllers. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2347 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'targets')
-rw-r--r--targets/bitworks/ims/Config.lb29
1 files changed, 29 insertions, 0 deletions
diff --git a/targets/bitworks/ims/Config.lb b/targets/bitworks/ims/Config.lb
new file mode 100644
index 0000000000..d81c110a98
--- /dev/null
+++ b/targets/bitworks/ims/Config.lb
@@ -0,0 +1,29 @@
+# Config file for the Bitworks ims board
+# This will make a target directory of ./ims
+
+target ims
+mainboard bitworks/ims
+
+option ROM_SIZE=524288
+
+romimage "normal"
+ option USE_FALLBACK_IMAGE=0
+ option ROM_IMAGE_SIZE=0x10000
+ option LINUXBIOS_EXTRA_VERSION=".0Normal"
+# payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf
+# payload ../../../../tg3--ide_disk.zelf
+# payload ../../../../../lnxieepro100.ebi
+ payload /etc/hosts
+end
+
+romimage "fallback"
+ option USE_FALLBACK_IMAGE=1
+ option ROM_IMAGE_SIZE=0x10000
+ option LINUXBIOS_EXTRA_VERSION=".0Fallback"
+# payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf
+# payload ../../../../tg3--ide_disk.zelf
+# payload ../../../../../lnxieepro100.ebia
+ payload /etc/hosts
+end
+
+buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback"