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authorStefan Reinauer <stepan@coresystems.de>2009-04-30 10:14:22 +0000
committerStefan Reinauer <stepan@openbios.org>2009-04-30 10:14:22 +0000
commitc7757f20ac3bf8771c3cabfef1c0970dbb12bd2a (patch)
treec72dd74c2301f653caa23820efde64fba153ed0f /targets
parent9cf95bfc64eecb289f5559da19307b737aa96488 (diff)
* Use latest version of intel microcodes from their Linux drivers page for
models 6ex and 6fx (core and core2 solo and duo). Also, use the names suggested by Intel for the microcode files instead our short version of it. This allows to create new microcode patches with a simple set of scripts. * some minor cpu setup fixes for c and p states Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4235 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'targets')
-rw-r--r--targets/kontron/986lcd-m/Config-abuild.lb4
1 files changed, 2 insertions, 2 deletions
diff --git a/targets/kontron/986lcd-m/Config-abuild.lb b/targets/kontron/986lcd-m/Config-abuild.lb
index 04821f2e96..cf076b9d9b 100644
--- a/targets/kontron/986lcd-m/Config-abuild.lb
+++ b/targets/kontron/986lcd-m/Config-abuild.lb
@@ -15,14 +15,14 @@ option FALLBACK_SIZE=1024*512
romimage "normal"
option USE_FALLBACK_IMAGE=0
- option ROM_IMAGE_SIZE=0x1a000
+ option ROM_IMAGE_SIZE=0x24000
option COREBOOT_EXTRA_VERSION=".0-normal"
payload __PAYLOAD__
end
romimage "fallback"
option USE_FALLBACK_IMAGE=1
- option ROM_IMAGE_SIZE=0x1a000
+ option ROM_IMAGE_SIZE=0x24000
option COREBOOT_EXTRA_VERSION=".0-fallback"
payload __PAYLOAD__
end