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authorMarc Jones <marc.jones@amd.com>2007-06-20 23:45:44 +0000
committerMarc Jones <marc.jones@amd.com>2007-06-20 23:45:44 +0000
commita0aaa752dd69a4454ddc94df1196607c14ea7756 (patch)
tree9344051b5c8cc105bb0a1792086bad8743395eff /targets
parentdfb3c130d5cdd3a01531c23c3d15e7a1010bf221 (diff)
Artec Group dbe61 mainboard support.
Now uses CAR. New code for SPD-less memory implementation. Updated IRQ routing. Signed-off-by: Marc Jones <marc.jones@amd.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2728 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'targets')
-rw-r--r--targets/artecgroup/dbe61/Config.lb17
1 files changed, 12 insertions, 5 deletions
diff --git a/targets/artecgroup/dbe61/Config.lb b/targets/artecgroup/dbe61/Config.lb
index 418cae0f5a..6a8478cc27 100644
--- a/targets/artecgroup/dbe61/Config.lb
+++ b/targets/artecgroup/dbe61/Config.lb
@@ -3,14 +3,21 @@
target dbe61
mainboard artecgroup/dbe61
+# HACK to get the right TSC support.
+option CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1
+
option CONFIG_COMPRESSED_PAYLOAD_NRV2B=0
+option CONFIG_COMPRESSED_PAYLOAD_LZMA=0
## ROM_SIZE is the total number of bytes allocated for LinuxBIOS use
## (normal AND fallback images and payloads).
-## leave 64k for vsa and 32K for video ROM
-option ROM_SIZE = 1024*256 - 64*1024 - 32 * 1024
+## leave 36k for vsa and 32K for video ROM
+#option ROM_SIZE = 1024*256 - 36*1024 - 32 * 1024
+
+#No VGA for now
+option ROM_SIZE = 1024*512 - 36*1024
-## ROM_IMAGE_SIZE is the maximum number of bytes allowed for a LinuxBIOS image,
+# ROM_IMAGE_SIZE is the maximum number of bytes allowed for a LinuxBIOS image,
## not including any payload.
option ROM_IMAGE_SIZE=64*1024
@@ -21,7 +28,7 @@ option MAXIMUM_CONSOLE_LOGLEVEL = 11
romimage "fallback"
option USE_FALLBACK_IMAGE=1
option LINUXBIOS_EXTRA_VERSION=".0Fallback"
- payload /tmp/filo.elf
+ payload ../payload.elf
end
-buildrom ./linuxbios.rom ROM_SIZE "fallback"
+buildrom ./dbe61.rom ROM_SIZE "fallback"