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| author | Greg Watson <jarrah@users.sourceforge.net> | 2004-01-13 21:59:17 +0000 |
|---|---|---|
| committer | Greg Watson <jarrah@users.sourceforge.net> | 2004-01-13 21:59:17 +0000 |
| commit | f6e4357130b0930fcdcf94f3c35460bd23be58c8 (patch) | |
| tree | 7c0b5ed8d15d29459bb64026b933b3e62c81b540 /targets/totalimpact | |
| parent | f0721563b48ff7e2ad1bd7398da2747ec1a3b055 (diff) | |
Total Impact briQ
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1327 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'targets/totalimpact')
| -rw-r--r-- | targets/totalimpact/briq/Config.lb | 89 |
1 files changed, 89 insertions, 0 deletions
diff --git a/targets/totalimpact/briq/Config.lb b/targets/totalimpact/briq/Config.lb new file mode 100644 index 0000000000..6a4975e602 --- /dev/null +++ b/targets/totalimpact/briq/Config.lb @@ -0,0 +1,89 @@ +# Config file for the Total Impact briQ +# This will make a target directory of ./briq + +loadoptions + +target briq + +uses CROSS_COMPILE +uses HAVE_OPTION_TABLE +uses CONFIG_COMPRESS +uses DEFAULT_CONSOLE_LOGLEVEL +uses CONFIG_USE_INIT +uses NO_POST +uses CONFIG_CONSOLE_SERIAL8250 +uses TTYS0_BASE +uses UART0_IO_BASE +uses CONFIG_IDE_STREAM +uses IDE_BOOT_DRIVE +uses IDE_SWAB IDE_OFFSET +uses ROM_SIZE +uses _RESET +uses _EXCEPTION_VECTORS +uses _ROMBASE +uses _ROMSTART +uses _RAMBASE +uses _RAMSTART +uses STACK_SIZE +uses HEAP_SIZE +uses CONFIG_BRIQ_750FX +uses CONFIG_BRIQ_7400 + +## use a cross compiler +#option CROSS_COMPILE="powerpc-eabi-" +#option CROSS_COMPILE="ppc_74xx-" + +## Use stage 1 initialization code +option CONFIG_USE_INIT=1 + +## We don't use compressed image +option CONFIG_COMPRESS=0 + +## Turn off POST codes +option NO_POST=1 + +## Enable serial console +option DEFAULT_CONSOLE_LOGLEVEL=8 +option CONFIG_CONSOLE_SERIAL8250=1 +option UART0_IO_BASE=0x3f0 +option TTYS0_BASE=0xfe000000+UART0_IO_BASE + +## Boot linux from IDE +option CONFIG_IDE_STREAM=1 +option IDE_BOOT_DRIVE=0 +option IDE_SWAB=1 +option IDE_OFFSET=0 + +# ROM is 1Mb +option ROM_SIZE=1048576 + +# Set stack and heap sizes (stage 2) +option STACK_SIZE=0x10000 +option HEAP_SIZE=0x10000 + +# Sandpoint Demo Board +romimage "normal" + ## Base of ROM + option _ROMBASE=0xfff00000 + + ## Sandpoint reset vector + option _RESET=_ROMBASE+0x100 + + ## Exception vectors (other than reset vector) + option _EXCEPTION_VECTORS=_RESET+0x100 + + ## Start of linuxBIOS in the boot rom + ## = _RESET + exeception vector table size + option _ROMSTART=_RESET+0x3100 + + ## LinuxBIOS C code runs at this location in RAM + option _RAMBASE=0x00100000 + option _RAMSTART=0x00100000 + + option CONFIG_BRIQ_750FX=1 + #option CONFIG_BRIQ_7400=1 + + mainboard totalimpact/briq +end + +buildrom ./linuxbios.rom ROM_SIZE "normal" |